1. Field of the Invention
This invention relates generally to an integrated circuit device, and, more particularly, to calibrating a driver impedance in the integrated circuit device.
2. Description of the Related Art
Integrated circuit devices are typically formed on semiconductor dice and then enclosed in a package, which may be mounted on a printed circuit board. To couple the integrated circuit device to other devices, the package may include one or more conductive pads or pins that are coupled to the integrated circuit device. When the package is mounted on the printed circuit board, the pins may come into electrical contact with conductive traces and/or wires on the printed circuit board, thereby permitting the integrated circuit device to communicate with other circuits or devices via the conductive traces and/or wires. For example, a processor may send instructions to a bus by transmitting a signal to a pin in the processor package. The signal may then be transmitted along a trace, to a pin in the package containing the bus circuitry, and to the bus circuitry.
In a typical embodiment, a package 100 may include a driver circuit 105 coupled to a pad 110 and internal circuitry 120, as shown in FIG. 1. The driver circuit 105 may be used to maintain the integrity of signals transmitted and/or received by the internal circuitry 120. In particular, matching the impedance of the driver circuit 105 to the impedance of a load 130, such as an external resistor, coupled to the pad 110 is important for preserving the integrity of signals transmitted and received by the internal circuitry 120. Thus, it is common in the art to calibrate an impedance of the driver circuit 105. For example, a plurality of drivers 140 in the driver circuit 105 may be coupled in parallel between the internal circuitry 120 and the pad 110. By selecting and activating one or more of the plurality of drivers 140, the impedance of the driver circuit 105 may be matched to a predicted impedance of the load 130. For example, if the drivers 140 each have an impedance of 240 Ω, then the driver circuit 105 shown in FIG. 1 may have an impedance of 240 Ω, 120 Ω, 80 Ω, or 60 Ω.
The driver circuit 105 consumes power when it is being calibrated, so the driver circuit 105 shown in FIG. 1 is calibrated periodically to conserve power. For example, a clock 150 may be coupled to the driver circuit 105, and the clock 150 may provide a periodic clock signal to the driver circuit 105. The driver circuit 105 may use the periodic clock signal to trigger a calibration every clock cycle. This approach has several drawbacks. First, it may not be necessary to calibrate the driver circuit 105 on every clock cycle. For example, the impedance of the driver circuit 105 and/or the impedance of the load 130 may change slowly relative to the period of the clock cycle. The unnecessary calibrations may waste power and unnecessarily heat the device.
Second, it may be necessary to calibrate the driver circuit 105 more often than once every clock cycle. For example, the impedance of the driver circuit 105 and/or the impedance of the load 130 may change rapidly relative to the period of the clock cycle. Calibrating the driver circuit 105 using the periodic clock signal may result in an impedance mismatch between the driver circuit 105 and the load 130 to form and/or persist. The impedance mismatch may degrade the integrity of signals transmitted through the pad 110 and the driver circuit 105. This may potentially degrade the performance of the internal circuitry 120 and the performance of circuits (not shown) in the load 130.